1. Field of the Invention
The present invention relates to a manufacturing method that is used to form an integrated circuit on a semiconductor substrate or the like, and particularly relates to a method for etching an upper structural layer that has been layered on a substrate.
2. Description of the Related Art
Optical disks such as CDs (Compact Disk) and DVDs (Digital Versatile Disk) have recently come to occupy a large position as information recording media. Playback devices for these optical disks irradiate laser light along a track of the optical disk and detect the reflected light by using an optical pick-up mechanism. Recorded data is played back based on changes in the intensity of the reflected light.
Since the data rate for reading from optical disks is extremely high, the light detector for detecting the reflected light is composed of a semiconductor device that uses a PIN photodiode having a high response rate. The weak photoelectric conversion signal generated by the light-receiving portion of the semiconductor device is amplified by an amplifier and then output to a subsequent signal-processing circuit. The length of wiring between the light-receiving portion and amplifier is therefore reduced as much as possible in order to maintain the frequency characteristics of the photoelectric conversion signal and to minimize the superposition of noise. The light-receiving portion and the circuit portion, including the amplifier and the like, are preferably formed on the same semiconductor chip because of these issues and also from the standpoint of reducing the cost of manufacturing the light detector.
FIG. 1 is a schematic cross-sectional diagram of a light detector in which the light-receiving portion and the circuit portion are adjacently disposed on the same semiconductor substrate. A PIN photodiode structure is formed on a semiconductor substrate 2 in an area corresponding to the light-receiving portion 4, and transistors and other circuit elements are formed in areas corresponding to the circuit portion 6.
The light detector in FIG. 1 is a bilayer wiring structure, and a wiring structure layer 10 is formed by sequentially layering a first interlayer insulation film 12, a first aluminum (Al) layer 14, a second interlayer insulation film 16, a second Al layer 18, and a third interlayer insulation film 20. The first Al layer 14 and second Al layer 18 are both patterned using photolithography techniques. For example, wiring 22 and planarizing pads 24 are formed in the circuit portion 6 by using the first Al layer 14; and wiring 26 and planarizing pads 28 are formed in the circuit portion 6 by using the second Al layer 18. An Al layer 30 for blocking light is layered on the wiring structure layer 10 of the circuit portion 6, and a silicon oxide film 32 and silicon nitride film 34 are furthermore sequentially formed as protective films. The interlayer insulation films are formed using SOG (Spin on Glass), BPSG (Borophosphosilicate Glass), TEOS (Tetra-ethoxy-silane), or other such material.
An upper structural layer 38 that includes the wiring structure layer 10 is layered on the semiconductor substrate 2 of the light-receiving portion 4. The upper structural layer 38 of the light-receiving portion 4 is preferably removed in order to increase the efficiency of light incidence on the semiconductor substrate 2 of the light-receiving portion 4. In view of this situation, the upper structural layer 38 is selectively etched back in the light-receiving portion 4 and is left unetched in the peripheral circuit portion 6 to form an aperture 36 in the upper structural layer 38 in the light-receiving portion 4.
The Al layers in the light-receiving portion 4 are removed by patterning in advance when the upper structural layer 38 is layered, and the interlayer insulation films 12, 16, 20, and other layers are layered on the light-receiving portion 4. Specifically, the upper structural layer 38 of the light-receiving portion 4 can be made to be lower than the peripheral circuit portion 6 to the extent that the Al layers are removed. In this manner, the bottom surface of the aperture does not become flat, as shown in FIG. 1, because the surface of the upper structural layer 38 is not flat and because of other factors, and nonuniformities in the amount of incident light may occur in the plane of the light-receiving portion 4.
A structure is adopted in which a light-receiving area pad composed of a polysilicon film is formed in correspondence with the position of the light-receiving portion 4 under the upper structural layer 38 in order to avoid the situation described above. The aperture is etched back from the surface of the upper structural layer 38 formed on the light-receiving area pad. The light-receiving area pad has a certain degree of effect to make the depth of the etching uniform within the plane of the aperture.
FIGS. 2A to 2E and FIGS. 3A to 3C are schematic diagrams that describe methods for manufacturing a conventional light detector in which a polysilicon film is first formed and an aperture is then formed in locations that correspond to the position of the light-receiving portion 4. The drawings are schematic cross-sectional diagrams of the vicinity of the light-receiving portion 4 in the principal steps of the method. A silicon oxide film 40 is formed on the semiconductor substrate 2 on which PIN photodiodes, transistors, and other components have been formed, and a polysilicon film 41 is deposited on the surface of the silicon oxide film (FIG. 2A).
A photoresist is coated onto the polysilicon film 41 to form a photoresist film 42. The photoresist film 42 is exposed using a photomask 43 that is configured to be capable of transmitting light in the area that corresponds to the light-receiving portion (FIG. 2B). A photoresist film 42′ that remains in a position corresponding to the light-receiving portion is thereafter formed by a development process (FIG. 2C).
The polysilicon film 41 is etched away using the photoresist film 42′ as an etching mask, and a light-receiving area pad 44 composed of polysilicon film is formed in an area that corresponds to the light-receiving portion (FIG. 2D).
The photoresist film 42′ on the light-receiving area pad 44 is removed and an upper structural layer 45 is thereafter layered on the light-receiving area pad 44 and silicon oxide film 40 (FIG. 2E).
A photoresist is subsequently coated onto the upper structural layer 45 to form a photoresist film 46. The photoresist film 46 is exposed using a photomask that blocks light from the area corresponding to the light-receiving portion. A photoresist film 46′ in which an aperture has been formed in a position that corresponds to the light-receiving portion is thereafter formed by a development process (FIG. 3A).
Next, the upper structural layer 45 is etched with the aid of a magnetron reactive ion etching (magnetron RIE) device by using the photoresist film 46′ as an etching mask. In this situation (FIG. 3B), an etching gas that contains CF4 is used on the upper structural layer 45. This step etches the upper structural layer 45 and the light-receiving area pad 44, and the aperture 48 is etched down to the upper surface of the silicon oxide film 40 (FIG. 3C).
A stepped portion is formed in the upper structural layer 45 between the light-receiving portion area and the circuit portion at the periphery of the light-receiving portion area so that metal wiring will not be formed on the light-receiving portion area of the upper structural layer 45 that forms the aperture 48 described above. As a result, the thickness of the upper structural layer 45 at the edge of the aperture of the photoresist film 46′ is greater than the thickness of the layer 45 in the center of the aperture of the photoresist film 46′ as shown in FIG. 3A.
For this reason, when the aperture 48 is formed by etching under the conditions described above, the thickness of the edges of the light-receiving portion after etching is greater than that at the center, as shown in FIG. 3C, and the photosensitivity is not uniform in the plane of the light-receiving portion.